Client:
Our client, a leading Multinational Semiconductor Wireless Telecommunications product manufacturer, requires Senior Physical Design Engineer for a role based in Cork City, Ireland.
Role:
You will have a background in physical design, STA, and power integrity engineering. You will be part of a global team that will drive and execute on all phases of the complete physical design flow for the next generation of SOCs in bleeding-edge technologies.
You will be part of a worldwide team responsible for the complete Physical Implementation and Sign-off for the next-gen core solutions.
Responsibilities: Working on the physical design execution from floorplan to GDS for high-speed complex designs with aggressive PPA targets.Managing schedules, plans, status, risks, and supporting cross-functional engineering efforts.Working with design and DFT teams on understanding design in the context of physical design timing closure and power optimization.Demonstrating a good understanding of and conducting research on industry trends and innovations in physical design to ensure solutions and deliverables align with best practices.Conducting complex analyses of test results using statistics and data predictions to track benchmarks and identify issues or areas for improvement.Working across teams to align on important areas of PPA improvement and ensure targets are met; ensures designs are innovative and compatible with the highest standards.Taking part in the research of innovative methodologies for pushing the PPA limits in physical design, including the development of new scripts and flows.Requirements: 3+ years of relevant experience in Physical Design.Knowledge of the entire PD flow from netlist to GDS (Floorplanning, Power planning, Placement/CTS/Routing, and corresponding optimization steps).Good experience and knowledge of tools for physical design implementation in advanced technology nodes (10nm and below).Experience using different techniques for low power designs and UPF/CPF flows and understanding of Conformal Low Power (CLP).Excellent understanding of STA and timing closure methodologies, including effects on congestion/routing/power.Understanding of power analysis and power integrity analysis.Understanding of Physical Verification and DRC closure.Expert in automation skills using Perl and Tcl and able to develop/support flows related to physical design.Good communication skills and ability & desire to work in a cross-functional team environment.Package Details: Apart from working in an open, relaxed, and collaborative space, you will enjoy:
Salary, stock, and performance-related bonus.Maternity/Paternity Leave.Employee stock purchase scheme.Matching pension scheme.Education Assistance.Relocation and immigration support (if needed).Life, Medical, Income, and Travel Insurance.Subsidized memberships for physical and mental well-being.Bicycle purchase scheme.Employee-run clubs, including running, football, chess, badminton, and many more.Education: Bachelor's degree in Science, Engineering, or related field.Contact:
For further information please contact Mícheál at Software Placements on 00353 1 5254642 or email ******.
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