SOC RTL and Integration, Senior/Staff Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are: You are a passionate and innovative SoC RTL and Integration Engineer with a keen eye for detail and a strong foundation in SoC Micro-Architecture, RTL Design, and IP Integration. You thrive in dynamic environments and are eager to take on new challenges in the semiconductor industry. Your technical acumen is complemented by your ability to perform RTL Quality Signoff Checks, develop timing constraints, and ensure design equivalence through formality checks. With a collaborative spirit, you excel in integrating IPs in SoCs/Subsystems and creating RTL designs tailored to customer needs. Your experience with static verification tools and synthesis, along with your deep understanding of design and architecture pitfalls, makes you an invaluable asset to any team. You are committed to continuous learning and staying abreast of the latest technologies in the field, ready to contribute to groundbreaking projects that shape the future of smart technology.
What You'll Be Doing: Perform RTL Quality Signoff Checks such as LINT, CDC, RDC.Understand the design/architecture and develop timing constraints for synthesis and timing.Run preliminary synthesis to ensure that the design can be synthesized as intended.Run formality to ensure equivalence of RTL and gates.Integrate IPs in SoCs/Subsystems and create RTL designs as per the needs of the customer.Collaborate with cross-functional teams to develop innovative solutions for complex design challenges.The Impact You Will Have: Ensuring the highest quality of RTL designs through comprehensive signoff checks.Developing precise timing constraints to facilitate successful synthesis and implementation.Maintaining design integrity and equivalence through rigorous formality checks.Seamlessly integrating IPs into SoCs/Subsystems, enhancing overall design efficiency and performance.Contributing to the delivery of cutting-edge SoC solutions for high-performance computing, automotive, aerospace, and defense sectors.Driving innovation and excellence in semiconductor design, shaping the future of smart technology.What You'll Need: Bachelor's or Master's degree in Electrical, Electronics, Computer Engineering, or equivalent.Minimum of 3+ years' experience in SoC Micro-Architecture, RTL Design, and IP Integration.Hands-on experience with static verification tools such as Spyglass for LINT, CDC, RDC checks.Strong conceptual understanding of design/architecture pitfalls across clock/reset domain crossings.Experience in synthesis and timing constraints development.Who You Are: Detail-oriented with a strong analytical mindset.Excellent problem-solving skills and the ability to work on complex design challenges.Collaborative team player with strong communication skills.Proactive and eager to learn and adapt to new technologies.Innovative thinker with a passion for continuous improvement and excellence.The Team You'll Be A Part Of: The Systems Solutions Group (SSG) at Synopsys delivers tool, methodology, architecture, design creation, design verification, and physical implementation expertise to enable leading-edge customers to complete their most challenging SoC design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our diverse customer base includes start-ups, industry leaders, commercial companies, and government agencies, developing SoCs for high-performance computing, automotive, aerospace, defense, and more.
Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#J-18808-Ljbffr