Responsibilities in Design and Verification Produce high quality RF/Analog/systems/sub-systems using industry best practice methods for design, verification and test according to project plans.
Design and verify RF/Analog blocks/subsystems (e.g.
LNA, VGA, PA, LCVCO, PLL, RF Filters, mixers, bandgaps, biasing networks, etc), intended for operating frequencies up to 20GHz, using industry standard tools and design flows.
Investigate the feasibility of RF/AMS system and circuit designs right down to detailed RF transistor implementations.
Write verification plans and create automated test benches.
Work closely with IC Layout Design Engineers to optimise design and layout.
Ensure that designs follow industry best practice design flows, verification techniques, Design For Test (DFT), isolation, power optimisation etc.
Host design/verification reviews.
Support lab evaluation, characterisation and test.
Interpersonal Interact with other engineers in the mixed signal, and digital/systems/SW/apps/test teams to ensure products are delivered to meet or exceed specifications on time and in budget.
Good team player with good interpersonal skills but can work independently on complex tasks.
Help drive continuous productivity improvements through improved work methodologies, efficient tool use and good documentation.
Mentor junior employees and interns.
Qualifications Minimum Masters of Science in Electronic Engineering or related field.
10+ years relevant industrial experience required.
Detailed design experience of RF/analog/mixed-signal circuits on advanced CMOS nodes (40nm and lower).
RF transistor/device modelling experience, including inductors, baluns, package effects, RF ESD and optimised RF layout.
Excellent working knowledge of the Cadence Virtuoso design environment.
Working knowledge of EM field solvers is desired such as Momentum, EMX, HFSS.
Clear and concise communication and presentation skills.
Experience with getting full chip designs to product release preferred.