Alternate Job Titles:Memory Layout Design Senior EngineerSenior Layout EngineerEmbedded Memory Layout Senior EngineerWe Are:At Synopsys, we drive the innovations that shape the way we live and connect.
Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.
We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
Join us to transform the future through continuous technological innovation.
Get to know more about Synopsys Foundation IP:Logic Library, Memory Compiler, OTP, NVM | Foundation IP | Synopsys You Are:You are an experienced Memory Layout Design Engineer with a passion for developing cutting-edge technology.
You possess a Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related fields.
With a minimum of 2 years of experience in layout design, you have advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.
Your strong communication, documentation, and analytical skills enable you to collaborate effectively with cross-functional teams.
You are detail-oriented, proactive, and thrive in a dynamic environment where innovation and continuous improvement are paramount.
What You'll Be Doing:Design, develop, and modify layout designs for Embedded Memory IPs, Standard Cells, and IOs.Improve and determine methods and procedures for layout development flow to ensure efficiency and accuracy.Collaborate with design engineers to optimize layout designs for performance and manufacturability.Conduct layout verification and ensure compliance with design rules and specifications.Provide technical guidance and mentorship to junior layout engineers.Stay updated with the latest industry trends and technologies to incorporate best practices in layout design.The Impact You Will Have:Enhancing the performance and reliability of our Embedded Memory IPs and other foundational IPs.Contributing to the efficiency and effectiveness of our layout development processes.Ensuring high-quality and manufacturable layout designs that meet industry standards.Supporting the seamless integration of our IPs into customer designs, accelerating their time-to-market.Driving innovation in layout design and setting new benchmarks for excellence in the industry.Fostering a culture of continuous improvement and technical excellence within the team.What You'll Need:Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related fields.Minimum of 2 years of experience in layout design.Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.Strong communication, documentation, and analytical skills.Proficiency in layout verification tools and methodologies.Who You Are:Detail-oriented and meticulous in your work.Proactive and able to work independently as well as part of a team.Excellent problem-solving skills and the ability to think critically.Adaptable and open to learning new technologies and methodologies.A strong communicator who can effectively collaborate with cross-functional teams.The Team You'll Be A Part Of:You will be part of a dynamic and innovative team focused on developing high-performance silicon IPs.
Our team collaborates closely with design engineers, verification engineers, and other stakeholders to deliver best-in-class solutions.
We are committed to continuous learning and improvement, fostering an environment where creativity and technical excellence thrive.
Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
Our total rewards include both monetary and non-monetary offerings.
Your recruiter will provide more details about the salary range and benefits during the hiring process.
#J-18808-Ljbffr